1. Field of the Invention
The present invention relates to a plasma display panel device that performs display by utilizing plasma discharge to emit light, and to a method for driving this device, and more particularly relates to a plasma display panel device in which malfunctions are reduced by decreasing the power source noise caused by generation of the discharge current, and to a method for driving this device.
2. Description of the Related Art
Plasma display panel devices (hereinafter referred to as PDP devices) are attracting notice as flat displays that have a large screen and a wide viewing angle. In particular, the three-electrode type of surface discharge AC drive PDP devices which have been developed recently allow full-color displays, and are expected to be very popular in television sets, computer display devices, and so forth.
A PDP device generates a discharge between a pair of electrodes by application of a discharge voltage between the electrodes, and the desired display is achieved through the generation of light from a fluorescent material that accompanies this discharge. In order to apply this discharge voltage, discharge voltage pulses are applied to at least one of the electrodes. The application of discharge voltage pulses is accompanied by the application of a high voltage between the electrodes, which generates a discharge, and excess discharge current flows from one of the electrodes toward the other electrode during the generation of this discharge.
FIG. 24 is a diagram illustrating the drive waveform of a conventional three-electrode surface discharge AC-PDP device. FIG. 24A illustrates a first example, and FIG. 24B a second example. A three-electrode surface discharge AC-PDP device has an address electrode A on one substrate, and has on another substrate an X electrode and a Y electrode disposed perpendicular to the address electrode. The drive method is as shown in simplified fashion in the figure, and comprises a reset period RST in which full writing W and full erasure E are performed, an address period ADD in which discharge is performed selectively according to the display data, and a sustaining discharge period SUS in which sustaining discharge is performed for an illuminated cell in the address period.
In both examples, the reference potential of the various electrodes is the ground potential, and when voltage pulses are applied, the specified voltage is applied from the ground potential, and the potential returns to its original ground level after a specific period of time. In the reset period, the Y electrodes are kept at the ground potential while high-voltage write pulses WP are applied to all of the X electrodes. The application of these write pulses WP causes all of the cells to light up and enter more or less the same state. After this, the X electrodes are kept at the ground potential while erase pulses EP are applied to all of the Y electrodes, so that all of the cells are lighted and then erased. As a result, no wall charges are stored in any of the cells.
In the subsequent address period ADD, negative scan pulses SCP are successively applied to the Y electrodes, and address pulses ADP are selectively applied to the address electrodes according to the display data in synchronization with the above-mentioned SCP application. As a result, the combined voltage of the two pulses SCP and ADP is applied between the address electrodes and the Y electrodes, generating an address discharge. Wall charges are stored in the lighted cells as a result of this. Then, in the sustaining discharge period, sustaining discharge pulses SUSP are applied alternately to the X electrodes and Y electrodes, which generates sustaining discharges a plurality of times for the above-mentioned cells in which walls charges are stored. The brightness of the cells is controlled by the number of these sustaining discharges. In example 1 in FIG. 24A, the sustaining pulses SUSP are positive voltage pulses, whereas in example 2 in FIG. 24B, the sustaining pulses SUSP are negative voltage pulses.
As mentioned above, in the sustaining discharge period, sustaining voltage pulses SUSP are alternately applied between the X electrodes and Y electrodes serving as the display electrodes. With a conventional drive method, the application of the sustaining voltage pulses SUSP maintains the X electrodes or Y electrodes at the ground potential, which is the reference potential, the potential is driven from this ground potential to the sustaining discharge voltage, that is, to the level of a positive voltage +Vs or the level of a negative voltage −Vs, and upon completion of the pulse period, the potential is returned to the ground potential level. When this sustaining discharge voltage is applied, excess discharge current flows between the X and Y electrodes, and the path thereof is a loop going from the sustaining discharge voltage power source of voltage +Vs or −Vs, to a switch circuit on the source side, one of the electrodes, a discharge space, the other electrode, a switch circuit on the sink side, and then the ground power source, and finally returning to the ground terminal of the sustaining discharge voltage power source.
This sustaining voltage pulses Vs are high-voltage, high-speed pulses with a voltage of approximately 200 V and a rise time of just a few hundred nanoseconds, and a peaked discharge current instantly flows as soon as the pulses are applied. Such a peak current is called a panel capacitance charging and discharging current, or a gas discharge current. When this large peaked current flows to the ground power source line, the voltage thereof is lowered by the impedance component had by the ground power source line, and a noise component, namely, a fluctuation in the ground potential, is generated. This noise component of the ground potential can become admixed in surrounding control circuits, disrupt the waveform of the control signals, and lead to malfunction. Or, even if a malfunction does not occur, distortion can occur not only in the control signals but also in the drive waveform itself, leading to the generation of a high-frequency component. The generation of a high-frequency component is a cause of electromagnetic wave noise being radiated to the surrounding area, and is also a cause of interference with external electrical devices.
These problems similarly occur in the application of write pulses between the X electrodes and Y electrodes in the reset period. Gas discharge current is generated during rise when the write pulses WP are applied, and a charging and discharging current is generated during fall at the completion of the application of the write pulses WP.
A separate problem is that when sustaining pulses SUSP of positive polarity are applied to the X and Y electrodes, if the address electrode A is maintained at the ground potential, then the address electrode side will have negative polarity, and a positive charge will be stored on the surface of the address electrode. This stored charge has a polarity that is added to the address voltage during the address period, so an excessively large address discharge is generated, which can lead to excess discharge to adjacent cells. This excess discharge is a cause of variance. Furthermore, if the address electrode side has an extremely negative voltage with respect to the X and Y electrodes, positive charges may collide with the fluorescent material provided on the address electrode, shortening the service life of the fluorescent material.
To solve such problems, as shown in FIG. 24A, it has been proposed that an intermediate voltage of Va be applied to the address electrode during the sustaining discharge period. In this case, however, if spiked noise is superimposed on the output side of the drive circuit of the address electrode as a result of capacity coupling or the like accompanying the application of the sustaining pulses, then the potential thereof will be at a level that is higher than the power source voltage level, there will be no margin with respect to the withstand voltage of the drive circuit, and adequate reliability cannot be ensured.